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Espressif Systems /ESP32-S2 /UART0 /MEM_RX_STATUS

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Interpret as MEM_RX_STATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0APB_RX_RADDR0RX_WADDR

Description

RX FIFO write and read offset address

Fields

APB_RX_RADDR

This register stores the offset address in RX_FIFO when software reads data from RX FIFO via APB.
RX_WADDR

This register stores the offset address in RX FIFO when Rx_FIFO_Ctrl writes RX FIFO.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data